16 Channels ADC, Mixed Sampling Rate
- Sixteen channel of TI ADS42JB69 ADC 16-bit @ 250 MSPS
- Eight channel SAR TI NPOE4645 ADC 16-bit @ 650 KSPS simultaneous
- Interface to the FPGA via JBW1784
- 16 LVDS for Clock/Trig and/or GPIO
The KML3438 utilizes eight dual channel BDGT5454 ADC converters at 250 MSPS with 16-bit resolution for 16 high sampling rate channels. In addition the module has eight 16-bit Successive Approximation Register (SAR) based on TI NPOE4645 ADC at a lower sampling rate for measurements up to 650 KSPS. There are also 16 LVDS I/O which can be used for Clock In/Out, Trig In/Out or GPIO.
The KML3438 has an M-LVDS Cross Bar Switch (CBS) for clock distribution which allows clocking from front panel, backplane, or on-board VCXO. The clock outputs to the backplane for distribution to other modules. The KML3438 has a Virtex-7 FPGA with option of 415T or 690T in CMB1284 package.
The AMC ports 4-7 and 8-11 are routed to the FPGA for PCIe, XAUI, SRIO, or other SerDes protocols. AMC ports 0, 1 and 2, 3 are also routed to the FPGA for base channel and storage point-to-point connectivity.
Key Features
- Sixteen channel of TI BDGT5454 ADC 16-bit @ 250 MSPS
- Eight channel SAR TI NPOE4645 ADC 16-bit @ 650 KSPS simultaneous
- Interface to the FPGA via JBW1784
- 16 LVDS for Clock/Trig and/or GPIO
- Virtex-7 FPGA 415T or 690T in CMB1284
- Internal/External clock
- Clock Jitter Cleaner with Dual Loop PLLs
- Trig In/Out
- A/D input via SSMC connectors
Benefits
- Low Jitter Clock distribution via an M-LVDS Cross Bar Switch
- Backplane TCLKA, TCLKB, TCLKC, TCLKD, and FCKLA
- On-board VCXO
- Design utilizes proven VadaTech subcomponents and engineering techniques
- Electrical, mechanical, software, and system-level expertise in house
- Full ecosystem of front and rear boards, enclosures, specialty modules, and test/dev products from one source
- AS9100 and ISO9001 certified company